1. Field of the Invention
The present invention relates to plastic encapsulated semiconductor devices and lead frames, and more particularly to plastic encapsulated semiconductor devices and lead frames best suited for preventing plastic crackings.
2. Description of the Prior Art
Traditionally in a plastic encapsulated semiconductor device, a configuration is employed to fix a semiconductor chip on a chip pad, while, at the same time, a plurality of leads are arranged on the circumference of the chip pad. Fine metal wires connect the leads to the terminals provided on the semiconductor chip and then the circumference thereof being encapsulated with plastic.
In recent years, however, there has been a tendency that the chip size becomes larger due to the higher integration of the semiconductor device whereas the external dimensions of the encapsulated semiconductor device cannot be expanded freely. On the other hand, there is a tendency that the device should further be miniaturized due to the requirements of its higher-density mounting. Nevertheless, the traditional configuration in which a semiconductor chip is mounted on a chip pad presents a problem such that if the dimensions of the semiconductor chip are made larger while the external dimensions of the device remain constant, the length of a portion where the leads are fixed to plastic (the distance of the portion of the inner lead section in which plastic should be filled) becomes insufficient, and the strength required for fixing the leads cannot be provided sufficiently.
Therefore, in order to avoid a problem such as this, there has been proposed a method disclosed in Japanese Patent Laid-Open No. 241959/1986 for bonding a plurality of inner leads adhesively to the circuit formation face of a semiconductor chip with an insulating member included therebetween, and for electrically connecting the inner leads to the semiconductor chip by fine metal wires, with the circumference thereof then being encapsulated with plastic. This configuration is sometimes called lead-on-chip. For a configuration having the same purpose but not using the chip pad, there is a reversed configuration of the lead-on-chip, i.e., a configuration called chip-on-lead. For examples of the chip-on-lead configuration, there have been techniques disclosed in the publications of Japanese Patent Laid-Open No. 154545/1989 and Japanese Patent Laid-Open No. 143344/1989.
Whereas the lead-on-chip is better for a higher integration as compared with the chip-on-lead, there is a need to provide special means for insulating between the circuit formation face of semiconductor chip and each of the leads. Hence, for the typical techniques disclosed in the publication of the Japanese Patent Laid-Open No. 241959/1986, an insulating film is included as an electrically insulating material between the inner leads and the circuit formation face.
For this insulating film, polyimide, etc. are used for its base material. Generally, however, the base materials for insulating film lack adhesiveness to encapsulating plastic.
The insulating film is usually used in a place where it is needed, i.e., the upper face of a semiconductor chip where the inner leads are mounted and not in any other places due to the necessity that the circuit formation face of the semiconductor chip is electrically connected to each of the inner leads, etc.
In a plastic encapsulated semiconductor device, thermal stresses are generated in the inside of the device by the temperature changes taking place during the fabrication processes thereof and the period of its use because the linear expansion coefficients of the semiconductor chip, inner lead, insulating film, and encapsulating plastic, which constitute the device, are usually different from each other. Particularly, the difference in the linear expansion coefficients between the inner lead and the plastic is great. There is also lack of adhesiveness between the inner lead and the plastic, and this easily causes an interfacial debonding for some reasons in a state where thermal stress is exerted.
Fundamentally, if the inner lead is adhesively fixed to the circuit formation face securely through the insulating film, the interfacial debonding should not occur or such occurrence of the debonding could be minimized. As described earlier, however, the adhesion strength between the end face of the insulating film and the encapsulating plastic, which form the base of adhesion, is weak. Therefore, the force which tends to separate the inner lead from the plastic causes the interfacial debonding between the end face of the insulating film and encapsulating plastic. Hence this interfacial debonding is developed to separate the inner lead and encapsulating plastic and allow the interfacial debonding to progress increasingly therebetween.
The interfacial debonding thus developed brings about plastic cracking at the upper edge of the inner lead to spoil the external appearance of the semiconductor device and may also cause the breakage of fine metal wires.
The inner leads, which are particularly susceptible to this danger, are inner leads for electrical connection called common signal (bus bar) leads. The common signal inner leads are used for supplying source, ground or other standard voltages to the semiconductor chip.